1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for etching a metal layer using TiO.sub.2 as a hard mask.
2. Description of the Related Art
The capacitance of a capacitor is proportional to the area of the electrodes and the dielectric constant of the dielectric layer between electrodes, and is inversely proportional to the distance between the electrodes. Therefore, high integration of a semiconductor device narrows the distance between the electrodes, thus increasing the capacitance of the capacitor.
In semiconductor devices, in particular, semiconductor memory devices, the capacitor is used to store data. The data stored in the capacitor must be maintained without change until it is read. Also, the data stored in the capacitor must be prevented from being damaged by a soft error generated by an external influence such as an .alpha. particle. Accordingly, a semiconductor memory device requires a capacitor with a sufficient capacitance to permit it to store and maintain data in spite of external influences, in a highly integrated state.
To meet such needs, various methods of maximizing the area of the storage node of the capacitor in a narrow area have been devised. One of the methods is to make the storage node three-dimensional, such as a stack type, a cylinder type, and a fin type. This method has the advantage that the area of the storage node is increased. However, the manufacturing process is complicated and the method may not be useful for highly integrated devices.
Another method is to use a dielectric layer having a high dielectric constant. BST, PZT(Pb(Zr,Ti)O.sub.3), and Y1 are examples of such dielectric layers. These dielectric layers have a dielectric constant of at least several hundred times that of a conventional NO or Ta.sub.2 O.sub.5 film. The high dielectric constant provides enough capacitance, even when the semiconductor device is highly integrated.
In order to use the high dielectric layer as the dielectric layer of the capacitor, a heat-resistant metal layer compatible with the high dielectric layer must be used as the electrode of the capacitor. A Pt film is widely used for this. The Pt film is oxidation-resistant in an oxygen atmosphere at a high temperature, and is advantageous to the growth of the high dielectric layer.
In the heat-resistant metal such as Pt, an evaporation degree of etch reactants is low. Therefore, the etch reactants adhere to the Pt film and serve as an etching mask. As a result, the side wall slope of the etched Pt film becomes positive. Also, the etch ratio of the Pt film is very low. Therefore, when the Pt film is patterned using a photoresist as a mask, the photoresist must be excessively thick, making it hard to form a fine pattern.
A method for etching the Pt film according to a conventional technology is provided in the U.S. Pat. No. 5,515,984; "Method for etching Pt film", issued May 14, 1996. In the method provided in this patent, an additional process of wet-etching after etching the Pt film is necessary in order to remove the Pt compound. Therefore, the process is complicated.